Substrates for use in the field of electronics, optoelectronics, and microelectromechanical systems (MEMS) devices are generally obtained by slicing/cutting/separating ingots. In the case of mono-crystalline silicon, for example, the ingots are obtained from a bath of molten silicon using the Czochralski (Cz) or the float zone (Fz) methods. These conventional methods produce cylindrical ingots which are cut by a circular or wire saw into slices perpendicular to the axis of the cylindrical ingot. The cut of the cylindrical ingots results in round wafers which are common for fabrication of general electronics and MEMS devices. In crystalline silicon solar cell production, silicon blocks are first prepared from the cylindrical ingots, before being cut into square or substantially square wafers.
Microprocessor and memory devices can function properly with less than one micron of silicon thickness. However, current silicon substrates in mass production are significantly thicker. 150 mm diameter silicon wafers have a standard thickness of ˜675 microns, 200 mm diameter silicon wafers have a standard thickness of ˜725 microns, and 300 mm diameter wafers have a standard thickness of ˜775 microns. A silicon-on-insulator (SOI) process has been developed to laminate a sub-micron pristine silicon layer on top of another insulating substrate (such as another silicon wafer with an insulating silicon oxide top layer). An improvement of transistor switching speed and a reduction in transistor power consumption have been reported for integrated circuits fabricated on the SOI substrate.
In production of general electronic devices with integrated circuits, multiple devices are first fabricated on a single wafer, and the devices at this stage are known as dies on the wafers. After completion of the manufacturing flow, wafers are cut along x- and y-directions to isolate individual dies, before each functional die is packaged with proper encapsulation and input/output (I/O) connectors. Often the wafers are thinned down from backside before the wafer dicing step. The reduced substrate thickness can help to yield a lower profile in the final package. Thin dies can also be stacked up for additional functionalities or a more compact final packaging size, desirable in consumer electronics applications.
Wafer thinning is also adopted in fabrication of MEMS devices. MEMS devices such as micro-sensors and micro-actuators are usually manufactured on silicon wafers with process steps similar to fabrication of general electronic devices, with addition of mechanical components in dimensions of 1-100 microns. Silicon substrates of a thickness less than 100 microns are also flexible, suitable for some ultra light-weight, portable applications, e.g. new gadgets in curved or flexible forms.
In crystalline silicon solar cell production, <200 micron thick substrates (156 mm×156 mm or 125 mm×125 mm square) are common today, while ˜150 micron substrate thickness are becoming available with the advanced wire-saw systems to cut silicon ingots/blocks. With a surface texturing, an anti-reflective coating (ARC) layer deposition on the front surface and a reflector layer deposition at the back surface, solar cells of 18-24% efficiency are currently manufactured on mono-crystalline silicon substrates of >150 microns thickness. With some advanced light trapping technologies, it is conceivable to maintain the high solar cell efficiency with a silicon substrate of 100 microns or less in thickness.
Silicon substrate cost often accounts for >50-60% of total manufacturing cost of mono-crystalline silicon solar cells. Thus there is a significant economical incentive to reduce silicon substrate thickness without reducing cell efficiency and without increasing manufacturing complexity/cost. However, current silicon substrate preparation technologies have their limitations. A cutting of hard materials such as silicon by wire saws is associated with a considerable consumable cost (cutting wires and slurries) and a significant kerf loss, i.e. the amount of silicon removed by cutting wires. Despite of the continuous improvements in wiresaw equipment, process and materials, it remains challenging to produce wafers of less than 100 microns thickness with a kerf loss of less than 100 microns.
Alternative technologies have been proposed for thin substrate fabrication in crystalline silicon solar cell production. In one method, ultrathin silicon wafers of less than 20 microns are produced by implantation of high energy hydrogen ions into silicon substrates, followed by a thermal or mechanical exfoliation. The idea is analogous to the commercial silicon-on-insulator (SOI) substrate technologies in advanced IC manufacturing. In another method, deposition of a thin metal (e.g. nickel) layer on the silicon substrate surface is followed by a low temperature anneal to form a thin metal silicide interface layer. A thin silicon wafer can then be exfoliated from the substrate by a mechanical wedge. Both silicon exfoliation methods can be repeated to produce multiple ultrathin silicon wafers (10-20 microns) from a single substrate with a negligible kerf loss.
Even though the silicon materials consumption can be lowered by the proposed silicon exfoliation technologies, hurdles exist for their adoption in mass production of solar cells. A reliable handling of ultrathin substrates of <50 micron thickness can be difficult. Different from wiresaw cutting of a silicon ingot which can produce multiple wafers in parallel, silicon wafers can only be exfoliated from the substrate one at a time. A periodic reconditioning of the substrate surface may also be necessary. As a result, manufacturing cost rises along with an increase of work-in-progress (WIP) inventory and cycle time. The ultrathin silicon substrates can also require some significant modifications in solar cell manufacturing processes. An ultrathin substrate requires a more sufficient light trapping to maintain a high solar cell efficiency, yet a proper surface texturing for efficient light trapping is difficult on a Si(111) surface, a preferred surface orientation for the silicon wafer exfoliation technologies. In addition, alternative metalization technologies may need to be developed to accommodate the fragile ultrathin silicon substrates.
The apparatus described in the present invention can comprise a laser unit. Different lasers have different active media for coherent light generation. The most common active media include gases (in gas lasers), rare-earth element doped crystals (in solid state lasers), and semiconductor materials (in semiconductor lasers). Other laser types include chemical lasers, dye lasers, metal vapor lasers, etc.
In a gas laser, an electrical circuit is discharged through a gas to produce a coherent light. For example, CO2 lasers can emit hundreds of kilowatts at 10.6 microns, and are often used in industrial applications such as cutting and welding. Excimer lasers are a subgroup of gas lasers which are powered by a chemical reaction involving an excited dimer, or excimer. Common ultraviolet (UV) excimer lasers include F2 laser (emitting at 157 nm), ArF laser (193 nm), KrCl laser (222 nm), KrF laser (248 nm), XeCl laser (308 nm), and XeF laser (351 nm).
In solid state lasers, a crystalline or glass rod is “doped” with ions for the required energy states in coherent light generation. Yttrium aluminum garnet (Nd:YAG), yttrium lithium fluoride (Nd:YLF) and yttrium orthovanadate (Nd:YVO4) lasers can produce powerful pulses at 1064 nm. The laser intensity can be amplified through an optical fiber. The so called fiber lasers can deliver multi-kilowatt laser powers with an excellent electricity to laser power conversion efficiency, and have increasing industrial applications in cutting, welding and marking of metals and other materials. Common Diode Pumped Solid State (DPSS) lasers wavelengths are 1064 nm, frequency-doubled 532 nm (green), frequency-tripled 355 nm (UV) and frequency-quadrupled 266 nm (UV).
Semiconductor lasers are commonly known as laser diodes. The active medium in laser diodes is a semiconductor material with a p-n junction. The emitting wavelength of laser iodides can range from ˜0.4 to 20 microns, with applications in telecommunications, holography, printing, and machining/welding. Laser iodides can also serve as pump sources for other lasers.
There are a number of laser applications in electronics device fabrications. The first group of applications is laser patterning/scribing. Laser patterning processes have been adopted in IC packaging and solar cell production, via a direct materials ablation process. A similar materials ablation process can also be used for laser dicing of wafers into individual dies. An alternative method for laser dicing involves focusing a high intensity laser beam inside the substrates. In the so-called Stealth Dicing process, the substrate materials is transparent to the laser irradiation of the basic frequency, but can be modified by a multi-photon absorption process at the laser converging point inside the substrate. After completion of the laser scan along the scribe lines, wafers are bonded to a supporting tape. When the supporting tape is stretched, dies can be separated with a near-zero kerf loss.
For silicon substrate, the preferred laser wavelength can be in the infrared (IR) range, exceeding 1 micron in wavelength. Frequency doubling is a non-linear photonic phenomenon, and is prominent under a high irradiation, e.g. at the focal point of a high power, short pulsed laser beam. In order to maximize the laser irradiation at the focal point, it can be advantageous to have a spot beam instead of a line beam.
Some other laser-based processes involve a melt or sub-melt of substrate materials. Applications include dopant activation on silicon wafers in advanced transistor fabrications, and amorphous silicon film crystallization on glass substrates as backplanes for high-resolution flat panel displays.
With a careful design of film stacks and a selection of suitable laser wavelength/power, a laser irradiation can also selectively melt a bonding layer and detach thin films/materials from the substrates. Applications include laser liftoff of LED dies from substrates (sapphire, silicon, etc.), and release of flexible displays from temporary carriers.
The present invention is also related to substrate handling in production of electronics devices. Substrates such as semiconductor wafers or large sheets of glasses can be held in compliance to substrate chucks by an electrostatic force or a pressure delta between two sides of the substrates. Some substrate chucks are in a direct physical contact with the substrates. In other chuck designs, substrate chucks are in a close proximity to but not in a direct physical contact with the substrates. The non-contact substrate chucks often adopt a fluid-mechanical design and operate like a return spring. The working distance (between the substrates and the chuck) and stiffness of the chuck “spring” can be optimized. Substrates can also be transported across the surface of stationary non-contact chucks. In flat panel display panel production, non-contact fluid-mechanical chucks have been used for automation of glass substrates in coating, patterning, and optical inspection/metrology processes. In thin film solar production, non-contact fluid-mechanical chucks have been adopted in automation of substrates for laser scribing, etc.